Design of a Differential Power Analysis Resistant Masked AES S-Box

DOI10.1007/978-3-540-77026-8_29MaRDI QIDQ5458225zbMATH OpenOpenAlexFDO

Authors

Publication date 11 April 2008

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/978-3-540-77026-8_29

Mathematics Subject Classification ID

Cryptography (94A60)

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Cites work

• Advanced Encryption Standard – AES
• Cryptographic Hardware and Embedded Systems - CHES 2004
• Fast Software Encryption
• scientific article; zbMATH DE number 1583801 (Why is no real title available?)
• scientific article; zbMATH DE number 2085436 (Why is no real title available?)
• scientific article; zbMATH DE number 1979284 (Why is no real title available?)
• scientific article; zbMATH DE number 2043314 (Why is no real title available?)
• scientific article; zbMATH DE number 1504809 (Why is no real title available?)
• Selected Areas in Cryptography
• Techniques for Random Masking in Hardware
• Topics in Cryptology – CT-RSA 2005
• Towards sound approaches to counteract power-analysis attacks

Cited in

(7)

• A Very Compact “Perfectly Masked” S-Box for AES
• A secure against high order DPA attacks AES coprocessor based on masking scheme
• Practical Attacks on Masked Hardware
• scientific article; zbMATH DE number 1979285 (Why is no real title available?)
• SM4 Chaotic Masking Scheme Against Power Analysis Based on FPGA
• Topics in Cryptology – CT-RSA 2005
• Information Security and Cryptology - ICISC 2005

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