Practical Attacks on Masked Hardware
From MaRDI portal
Recommendations
Cites work
- Advanced Encryption Standard – AES
- Changing the Odds Against Masked Logic
- DPA Leakage Models for CMOS Logic Circuits
- scientific article; zbMATH DE number 2079921 (Why is no real title available?)
- scientific article; zbMATH DE number 1759354 (Why is no real title available?)
- Power Analysis Attacks
- Topics in Cryptology – CT-RSA 2005
Cited in
(10)- QRL: a high performance quadruple-rail logic for resisting DPA on FPGA implementations
- PET SNAKE: A Special Purpose Architecture to Implement an Algebraic Attack in Hardware
- A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques
- scientific article; zbMATH DE number 1149908 (Why is no real title available?)
- Techniques for Random Masking in Hardware
- An interleaved EPE-immune PA-DPL structure for resisting concentrated EM side channel attacks on FPGA implementation
- Early propagation and imbalanced routing, how to diminish in FPGAs
- Template Attacks on Masking—Resistance Is Futile
- Changing the Odds Against Masked Logic
- Topics in Cryptology – CT-RSA 2005
This page was built for publication: Practical Attacks on Masked Hardware
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3623046)