Parallel fault simulation on a multiprocessor

DOI10.1080/00207729208949437MaRDI QIDQ4025779zbMATH OpenOpenAlexFDO

Authors

Publication date 18 February 1993

Published in International Journal of Systems Science. Principles and Applications of Systems and Integration (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1080/00207729208949437

zbMATH Keywords

benchmark circuitsfault simulation algorithmtransputer based multiprocessor

Mathematics Subject Classification ID

Distributed algorithms (68W15)

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Cites work

• A Deductive Method for Simulating Faults in Logic Circuits
• Comparison of Parallel and Deductive Fault Simulation Methods

Cited in

(13)

• Emulating digital logic using transputer networks (very high parallelism \(=\) simplicity \(=\) performance)
• Parallel defect control
• Efficient VLSI fault simulation
• A parallel system for test pattern generation
• Multiprocessor simulation strategies with optimal speed-up
• The parallel simulation of functional single-state-transition faults
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• Input mapping algorithm for parallel transistor structures
• A gate-level simulation environment for alpha-particle-induced transient faults
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