The parallel simulation of functional single-state-transition faults
The problem of fault simulation for sequential digital devices is considered. New parallel simulation method of functional single-state-transition faults for finite state machine on gate level description is proposed. The simulation is realized in the multivalued alphabet that is a subset of the universal 16-valued alphabet \(B_{16}\). Using functional single-state-transition fault model allows to reduce a number of simulated faults and consequently allows essentially to reduce simulation time in comparison with methods utilizing the stuck-at fault model. Also single-state-transition fault model allows to increase an accuracy of the fault coverage estimation.
- Structural approach to functional faults testing in discrete devices
- Fault simulation in multivalued alphabets
- Concurrent analogue fault simulation, the equation formulation aspect
- Serial diagnostic fault simulation for synchronous sequential circuits
- Parallel fault simulation on a multiprocessor
- On fault simulation for synchronous sequential circuits
- A gate-level simulation environment for alpha-particle-induced transient faults
- Localizing Faults in Simulink/Stateflow Models with STL
- Fast deterministic simulation of computations on faulty parallel machines
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