Recommendations
Cited in
(21)- Optimized 4-bit quantum reversible arithmetic logic unit
- Automatic test pattern generation for multiple missing gate faults in reversible circuits. Work in progress report
- QMDD-based one-pass design of reversible logic: exploring the available degree of freedom (work-in-progress report)
- An improved design of \(n\)-bit universal reversible gate library
- Reversible computing from a programming language perspective
- A classical propositional logic for reasoning about reversible logic circuits
- A Fully Fault-Tolerant Representation of Quantum Circuits
- Design and fabrication of a microprocessor using adiabatic CMOS and Bennett clocking
- The group of dyadic unitary matrices.
- Optimization approaches for designing quantum reversible arithmetic logic unit
- Initial ideas for automatic design and verification of control logic in reversible HDLs (work in progress report)
- Six Synthesis Methods for Reversible Logic
- On the road to the quantum computer. Outline of a reversible logic
- Clean reversible simulations of ranking binary trees
- A Design-Based Model of Reversible Computation
- An efficient method to synthesize reversible logic by using positive Davio decision diagrams
- Adiabatic implementation of reversible logic circuits in CMOS technology
- Minimal reversible circuit synthesis on a DNA computer
- An improved lower bound on the gate count for Toffoli-based reversible logic circuits realizing given reversible functions
- A finite state automaton for quantum computing
- Fundamentals of reversible flowchart languages
This page was built for publication: Towards a design flow for reversible logic
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3577129)