Towards a design flow for reversible logic
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Publication:3577129
DOI10.1007/978-90-481-9579-4zbMATH Open1210.94123OpenAlexW4213350534WikidataQ59242654 ScholiaQ59242654MaRDI QIDQ3577129FDOQ3577129
Authors: Robert Wille, Rolf Drechsler 
Publication date: 4 August 2010
Full work available at URL: https://doi.org/10.1007/978-90-481-9579-4
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Fault detection; testing in circuits and networks (94C12) Applications of design theory to circuits and networks (94C30)
Cited In (18)
- Six Synthesis Methods for Reversible Logic
- An efficient method to synthesize reversible logic by using positive Davio decision diagrams
- The group of dyadic unitary matrices.
- Reversible computing from a programming language perspective
- Optimization approaches for designing quantum reversible arithmetic logic unit
- Clean Reversible Simulations of Ranking Binary Trees
- A classical propositional logic for reasoning about reversible logic circuits
- Adiabatic implementation of reversible logic circuits in CMOS technology
- Design and fabrication of a microprocessor using adiabatic CMOS and Bennett clocking
- Initial ideas for automatic design and verification of control logic in reversible HDLs (work in progress report)
- Fundamentals of reversible flowchart languages
- Minimal reversible circuit synthesis on a DNA computer
- QMDD-based one-pass design of reversible logic: exploring the available degree of freedom (work-in-progress report)
- A Design-Based Model of Reversible Computation
- On the road to the quantum computer. Outline of a reversible logic
- Optimized 4-bit quantum reversible arithmetic logic unit
- Automatic test pattern generation for multiple missing gate faults in reversible circuits. Work in progress report
- A Fully Fault-Tolerant Representation of Quantum Circuits
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