Optimization approaches for designing quantum reversible arithmetic logic unit

DOI10.1007/S10773-015-2782-0zbMATH Open1338.81133OpenAlexW1276671512MaRDI QIDQ293885FDOQ293885

Authors: Majid Haghparast, Ali Bolhassani 

Publication date: 9 June 2016

Published in: International Journal of Theoretical Physics (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10773-015-2782-0

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zbMATH Keywords

quantum computationlow power designquantum computerquantum costquantum gatesreversible ALUreversible logic

Mathematics Subject Classification ID

Quantum computation (81P68)

Cites Work

• Conservative logic
• Quantum computational networks
• Irreversibility and Heat Generation in the Computing Process
• Logical Reversibility of Computation
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• Novel design for reversible arithmetic logic unit
• Novel reversible fault tolerant error coding and detection circuits
• Reversible arithmetic logic unit for quantum arithmetic
• Minimization and optimization of reversible bcd-full adder/subtractor using genetic algorithm and don't care concept
• Towards a design flow for reversible logic
• Title not available (Why is that?)
• Title not available (Why is that?)

Cited In (21)

• A dynamic programming approach to multi-objective logic synthesis of quantum circuits
• Parallel Optimization of a Reversible (Quantum) Ripple-Carry Adder
• Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit
• Novel quaternary quantum decoder, multiplexer and demultiplexer circuits
• Energy efficient adiabatic multiplier-accumulator design
• Adiabatic implementation of reversible logic circuits in CMOS technology
• Reversible and Quantum Circuit Optimization: A Functional Approach
• Design and fabrication of CSWAP gate based on nano-electromechanical systems
• Minimization and optimization of reversible bcd-full adder/subtractor using genetic algorithm and don't care concept
• Novel design for reversible arithmetic logic unit
• Optimization approaches for designing a novel 4-bit reversible comparator
• A fault-tolerant and scalable column-wise reversible quantum multiplier with a reduced size
• Optimized 4-bit quantum reversible arithmetic logic unit
• Designing novel quaternary quantum reversible subtractor circuits
• Efficient designs of reversible BCD to EX-3 converter with low quantum cost in nanoscale
• Efficient circuit design of reversible square
• On design of parity preserving reversible adder circuits
• Novel quantum compressor designs using new genetic algorithm-based simulator, analyzer and synthesizer software in nanotechnology
• Reversible arithmetic logic unit for quantum arithmetic
• Optimization of quantum Boolean circuits by relative-phase Toffoli gates
• Optimized quantum implementation of novel controlled adders/subtractors

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