Optimization approaches for designing quantum reversible arithmetic logic unit
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Publication:293885
DOI10.1007/S10773-015-2782-0zbMATH Open1338.81133OpenAlexW1276671512MaRDI QIDQ293885FDOQ293885
Ali Bolhassani, Majid Haghparast
Publication date: 9 June 2016
Published in: International Journal of Theoretical Physics (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10773-015-2782-0
quantum computationlow power designquantum computerquantum costquantum gatesreversible ALUreversible logic
Cites Work
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- Conservative logic
- Quantum computational networks
- Irreversibility and Heat Generation in the Computing Process
- Logical Reversibility of Computation
- Novel design for reversible arithmetic logic unit
- NOVEL REVERSIBLE FAULT TOLERANT ERROR CODING AND DETECTION CIRCUITS
- Reversible arithmetic logic unit for quantum arithmetic
- MINIMIZATION AND OPTIMIZATION OF REVERSIBLE BCD-FULL ADDER/SUBTRACTOR USING GENETIC ALGORITHM AND DON'T CARE CONCEPT
- Towards a Design Flow for Reversible Logic
Cited In (9)
- A dynamic programming approach to multi-objective logic synthesis of quantum circuits
- Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit
- Novel quaternary quantum decoder, multiplexer and demultiplexer circuits
- Reversible and Quantum Circuit Optimization: A Functional Approach
- A fault-tolerant and scalable column-wise reversible quantum multiplier with a reduced size
- Optimized 4-bit quantum reversible arithmetic logic unit
- Designing novel quaternary quantum reversible subtractor circuits
- On design of parity preserving reversible adder circuits
- Optimization of quantum Boolean circuits by relative-phase Toffoli gates
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