Towards a notion of unsatisfiable and unrealizable cores for LTL
DOI10.1016/J.SCICO.2010.11.004zbMATH Open1242.68075OpenAlexW2149150933MaRDI QIDQ433349FDOQ433349
Authors: Viktor Schuppan
Publication date: 13 July 2012
Published in: Science of Computer Programming (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.scico.2010.11.004
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Problem solving in the context of artificial intelligence (heuristics, search strategies, etc.) (68T20) Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30) Logic in computer science (03B70)
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Cited In (9)
- Extracting unsatisfiable cores for LTL via temporal resolution
- Enhancing unsatisfiable cores for LTL with information on temporal relevance
- Analysing sanity of requirements for avionics systems
- Diagnosis of deep discrete-event systems
- Tightening the contract refinements of a system architecture
- Towards a notion of unsatisfiable cores for LTL
- Debugging design errors by using unsatisfiable cores
- Reactive synthesis with maximum realizability of linear temporal logic specifications
- Enhancing unsatisfiable cores for LTL with information on temporal relevance
Uses Software
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