Capacity-constrained scheduling for a logic IC final test facility
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Publication:4474709
DOI10.1080/0020754032000123588zbMATH Open1052.90560OpenAlexW2022572783MaRDI QIDQ4474709FDOQ4474709
Authors:
Publication date: 12 July 2004
Published in: International Journal of Production Research (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1080/0020754032000123588
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Cites Work
- Rolling horizon algorithms for a single-machine dynamic scheduling problem with sequence-dependent setup times
- A local search heuristic for unrelated parallel machine scheduling with efficient neighborhood search
- Rolling horizon procedures for dynamic parallel machine scheduling with sequence-dependent setup times
Cited In (10)
- Scheduling of unrelated parallel manufacturing cells with limited human resources
- Semiconductor final-test scheduling under setup operator constraints
- Capacity planning with sequential two-level time constraints in the back-end process of wafer fabrication
- Semiconductor final test scheduling with Sarsa\((\lambda , k)\) algorithm
- Capacity planning with reconfigurable kits in semiconductor test manufacturing
- In-house development of scheduling decision support systems: case study for scheduling semiconductor device test operations
- Scheduling semiconductor multihead testers using metaheuristic techniques embedded with lot-specific and configuration-specific information
- Infinite capacity planning for IC packaging plants
- Capacity-constrained production scheduling of multiple vehicle programs in an automotive pilot plant
- Design and validation of heuristic algorithms for simulation-based scheduling of a semiconductor backend facility
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