On the synthesis of circuits admitting complete fault detection test sets of constant length under arbitrary constant faults at the outputs of the gates
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(17)- An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits
- Lower bounds for the lengths of single tests for Boolean circuits
- A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
- Minimal length test vectors for multiple-fault detection
- Lower bound of the length of a single fault diagnostic test with respect to insertions of a mod-2 adder
- Short single tests for circuits with arbitrary stuck-at faults at outputs of gates
- Synthesis of circuits admitting complete checking tests of constant length under inverse faults at outputs of elements
- Method of synthesis of easily testable circuits admitting single fault detection tests of constant length
- Synthesis of easily testable circuits over the Zhegalkin basis in the case of constant faults of type 0 at outputs of elements
- Estimations of the lengths of tests for logic gates in presence of many permissible faults
- scientific article; zbMATH DE number 3922347 (Why is no real title available?)
- Complete fault detection tests of length 2 for logic networks under stuck-at faults of gates
- Short Complete Fault Detection Tests for Logic Networks with Fan-In Two
- SINGLE FAULT DETECTION TESTS FOR LOGIC NETWORKS OF AND, NOT GATES
- On testing output faults in the McCluskey fault model
- On the exact value of the length of the minimal single diagnostic test for a particular class of circuits
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