Design constraints for third-order PLL nodes in master-slave clock distribution networks

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Publication:720170

DOI10.1016/J.CNSNS.2009.09.039zbMATH Open1222.94048OpenAlexW2092361954MaRDI QIDQ720170FDOQ720170


Authors: A. G. Rigon, Átila Madureira Bueno, André Alves Ferreira, José Roberto C. Piqueira Edit this on Wikidata


Publication date: 13 October 2011

Published in: Communications in Nonlinear Science and Numerical Simulation (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.cnsns.2009.09.039




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