Design constraints for third-order PLL nodes in master-slave clock distribution networks
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Publication:720170
DOI10.1016/J.CNSNS.2009.09.039zbMATH Open1222.94048OpenAlexW2092361954MaRDI QIDQ720170FDOQ720170
Authors: A. G. Rigon, Átila Madureira Bueno, André Alves Ferreira, José Roberto C. Piqueira
Publication date: 13 October 2011
Published in: Communications in Nonlinear Science and Numerical Simulation (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.cnsns.2009.09.039
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Cites Work
- Nonlinear oscillations, dynamical systems, and bifurcations of vector fields
- Nonlinear control systems: An introduction
- Fast projection methods for minimal design problems in linear system theory
- Title not available (Why is that?)
- Title not available (Why is that?)
- All-pole phase-locked loops: calculating lock-in range by using Evan's root-locus
- Models for master-slave clock distribution networks with third-order phase-locked loops
Cited In (10)
- Processing and transmission of timing signals in synchronous networks
- Accidental phase modulation in second-order phase-locked loops
- Exploring the Dynamics of a Third-Order Phase-Locked Loop Model
- Models for master-slave clock distribution networks with third-order phase-locked loops
- Hopf bifurcation and chaos in a third-order phase-locked loop
- Robust clock generation system
- Unstable PLL-Controller as FM Modulator and Detection of Modulating Self-Oscillations
- Phase-locked loop design applied to frequency-modulated atomic force microscope
- Fully connected PLL networks: how filter determines the number of nodes
- Self-oscillations of a third order PLL in periodic and chaotic mode and its tracking in a slave PLL
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