Area-time tradeoff for rectangular matrix multiplication in VLSI models

DOI10.1016/0020-0190(84)90104-2zbMATH Open0543.68030OpenAlexW2079650983MaRDI QIDQ796300FDOQ796300

Authors: Grazia Lotti 

Publication date: 1984

Published in: Information Processing Letters (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0020-0190(84)90104-2

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zbMATH Keywords

lower boundmatrix multiplicationarea-time complexityVLSI modelsarea-time tradeoff

Mathematics Subject Classification ID

Analysis of algorithms and problem complexity (68Q25)

Cites Work

• Area-time optimal VLSI networks for multiplying matrices
• Area-time tradeoffs for matrix multiplication and related problems in VLSI models
• The Area-Time Complexity of Binary Multiplication

Cited In (6)

• The matrix equation MX + XN = B in the VLSI model
• Area-time tradeoffs for bilinear forms computations in VLSI
• Area-time complexity of the unconstrained minimization problem
• Area—Time optimal VLSI integer multiplier with minimum computation time
• Area-period tradeoffs for multiplication of rectangular matrices
• Title not available (Why is that?)

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