DiVinE

swMATH4130MaRDI QIDQ16315FDOQ16315

Author name not available (Why is that?)

Cited In (40)

• Parallel Nested Depth-First Searches for LTL Model Checking
• Cluster-Based LTL Model Checking of Large Systems
• Distributed breadth-first search LTL model checking
• Partial Order Reduction for State/Event LTL
• Semi-external LTL Model Checking
• CTRL: extension of CTL with regular expressions and fairness operators to verify genetic regulatory networks
• Model Checking of Biological Systems
• Title not available (Why is that?)
• Title not available (Why is that?)
• The sweep-line state space exploration method
• Revisiting Resistance Speeds Up I/O-Efficient LTL Model Checking
• Partial order reduction for state/event LTL with application to component-interaction automata
• Analysing sanity of requirements for avionics systems
• Partitioned event graph: formalizing LP-based modelling of parallel discrete-event simulation
• CUDA accelerated LTL model checking -- revisited
• Improved Multi-Core Nested Depth-First Search
• Fairness modulo theory: a new approach to LTL software model checking
• Distributed verification of multi-threaded C++ programs
• Exploiting step semantics for efficient bounded model checking of asynchronous systems
• Automated formal analysis and verification: an overview
• Search-Order Independent State Caching
• Optimising the ProB model checker for B using partial order reduction
• An algorithm for estimating parameters of state-space models
• Formal verification of mobile robot protocols
• Flash memory efficient LTL model checking
• On algorithmic analysis of transcriptional regulation by LTL model checking
• An Overview of the mCRL2 Toolset and Its Recent Advances
• Distributed Algorithms for SCC Decomposition
• Quo Vadis Explicit-State Model Checking
• Parallel model checking large-scale genetic regulatory networks with DiVinE
• Multi-core Nested Depth-First Search
• Almost linear Büchi automata
• Space effective model checking for component-interaction automata
• Leveraging compiler intermediate representation for multi- and cross-language verification
• On-the-fly parallel model checking algorithm that is optimal for verification of weak LTL properties
• STL*: extending signal temporal logic with signal-value freezing operator
• Computation Tree Regular Logic for Genetic Regulatory Networks
• Collaborative models for autonomous systems controller synthesis
• The ComBack Method Revisited: Caching Strategies and Extension with Delayed Duplicate Detection
• On the Complexity of Bounded Context Switching.

This page was built for software: DiVinE