On figures of merit in reversible and quantum logic designs

DOI10.1007/s11128-009-0106-0zbMath1181.81024OpenAlexW2055906143MaRDI QIDQ1039611

Majid Mohammadi, Mohammad Eshghi

Publication date: 23 November 2009

Published in: Quantum Information Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11128-009-0106-0

zbMATH Keywords

delayreversible logicquantum circuitquantum costconstant inputsgarbage outputsweighted number of gates

Mathematics Subject Classification ID

Quantum computation (81P68)

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Cites Work

• Evolutionary approach to quantum and reversible circuits synthesis
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