A METHOD FOR CONSTRUCTING LOGIC NETWORKS ALLOWING SHORT SINGLE DIAGNOSTIC TESTS

DOI10.17223/20710410/46/4zbMath1458.94331OpenAlexW4250906003MaRDI QIDQ5151288

Kirill A. Popkov

Publication date: 17 February 2021

Published in: Prikladnaya Diskretnaya Matematika (Search for Journal in Brave)

Full work available at URL: http://mathnet.ru/eng/pdm683

zbMATH Keywords

Boolean functioninverse faultstuck-at faultlogic networksingle fault detection testsingle diagnostic test

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12) Switching theory, applications of Boolean algebras to circuits and networks (94C11)

Related Items

Short single fault detection tests for logic networks under arbitrary faults of gates, Some classes of easily testable circuits in the Zhegalkin basis, Lower bound of the length of a single fault diagnostic test with respect to insertions of a mod-2 adder, On self-correcting logic circuits of unreliable gates with at most two inputs

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