A new class of sequential circuits with combinational test generation complexity

DOI10.1109/12.869321MaRDI QIDQ4571371zbMATH OpenOpenAlexFDO

Authors Hideo Fujiwara

Publication date 9 July 2018

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://semanticscholar.org/paper/d11d90e6828d9a63ca4c69be2eb5bf9bcc42437c

Mathematics Subject Classification ID

Formal languages and automata (68Q45) Analytic circuit theory (94C05)

Cited in

(6)

• An algorithm for development of orthogonal test sequences for binary multivariate nonlinear sequential-cellular machines
• Fast test generation for m-logic combinational circuits
• scientific article; zbMATH DE number 3972795 (Why is no real title available?)
• scientific article; zbMATH DE number 3987203 (Why is no real title available?)
• On the role of hardware reset in synchronous sequential circuit test generation
• Test generation for iterative logic arrays based on an N-cube of cell states model

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