Fast test generation for m-logic combinational circuits

DOI10.1080/00207218908925363MaRDI QIDQ3481653zbMATH OpenOpenAlexFDO

Authors Iwan Georgiew Tabakow

Publication date 1989

Published in International Journal of Electronics (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1080/00207218908925363

zbMATH Keywords

fast test generation algorithmM-differencem-logic combinational circuits

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

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• Test generation for iterative logic arrays based on an N-cube of cell states model

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