Modelling of source-coupled logic gates

DOI10.1002/CTA.188MaRDI QIDQ3149541zbMATH OpenOpenAlexWikidataFDO

Authors Massimo Alioto, G. Palumbo, S. Pennisi

Publication date 25 September 2002

Published in International Journal of Circuit Theory and Applications (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1002/cta.188

zbMATH Keywords

modellingpropagation delaynoise margincurrent mode logic gatesSCL gatessource-coupled logic gates

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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