Masking large keys in hardware: a masked implementation of McEliece
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Publication:2807215
DOI10.1007/978-3-319-31301-6_18zbMATH Open1396.94067OpenAlexW2400838048MaRDI QIDQ2807215FDOQ2807215
Authors: Cong Chen, Thomas Eisenbarth, Ingo von Maurich, Rainer Steinwandt 
Publication date: 19 May 2016
Published in: Lecture Notes in Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-319-31301-6_18
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Cites Work
- Polynomial-Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer
- Title not available (Why is that?)
- Fundamentals of Error-Correcting Codes
- On the inherent intractability of certain coding problems (Corresp.)
- Smaller Keys for Code-Based Cryptography: QC-MDPC McEliece Implementations on Embedded Devices
- Threshold Implementations Against Side-Channel Attacks and Glitches
- Towards Side-Channel Resistant Implementations of QC-MDPC McEliece Encryption on Constrained Devices
- Pushing the limits: a very compact and a threshold implementation of AES
- A More Efficient AES Threshold Implementation
- Higher-Order Threshold Implementations
- Differential Power Analysis of a McEliece Cryptosystem
- Arithmetic Addition over Boolean Masking
- Secure Conversion between Boolean and Arithmetic Masking of Any Order
Cited In (7)
- Masking AES with \(d+1\) shares in hardware
- Efficiently masking polynomial inversion at arbitrary order
- Higher-order masked Saber
- Side Channels in the McEliece PKC
- Techniques for Random Masking in Hardware
- Formal verification of arithmetic masking in hardware and software
- Practical power analysis attacks on software implementations of McEliece
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