Diagrammatic Reasoning for Delay-Insensitive Asynchronous Circuits
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Publication:4922073
DOI10.1007/978-3-642-38164-5_5zbMATH Open1264.94126OpenAlexW32293111MaRDI QIDQ4922073FDOQ4922073
Publication date: 28 May 2013
Published in: Computation, Logic, Games, and Quantum Foundations. The Many Facets of Samson Abramsky (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-642-38164-5_5
Cites Work
- Title not available (Why is that?)
- Title not available (Why is that?)
- Categorical quantum mechanics
- Geometry of synthesis
- Geometry of synthesis III
- Geometry of Synthesis II: From Games to Delay-Insensitive Circuits
- A formal approach to designing delay-insensitive circuits
- Higher-dimensional word problems with applications to equational logic
- Towards an algebraic theory of Boolean circuits.
- On the Hopf algebraic origin of Wick normal ordering.
- Syntactic control of concurrency
Cited In (11)
- Title not available (Why is that?)
- Towards compositional graph theory
- Title not available (Why is that?)
- Title not available (Why is that?)
- The calculus of signal flow diagrams. I: Linear relations on streams.
- Interacting Hopf algebras
- Bialgebraic foundations for the operational semantics of string diagrams
- Contextual equivalence for signal flow graphs
- Confluence of Graph Rewriting with Interfaces
- String diagram rewrite theory III: Confluence with and without Frobenius
- Diagrammatic Semantics for Digital Circuits.
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