scientific article; zbMATH DE number 4201658
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Publication:3350795
zbMATH Open0727.68083MaRDI QIDQ3350795FDOQ3350795
Authors: V. I. Varshavskij, M. A. Kishinevskij, Alekseĭ Yu. Kondrat'ev, L. Ya. Rosenblyum, Alexander Taubin
Publication date: 1988
Title of this publication is not available (Why is that?)
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- Construction of a recurrent retrospective model of an asynchronous sequential device from its original description as a logical network
- On process-algebraic verification of asynchronous circuits
- A unified framework for race analysis of asynchronous networks
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- Signal Transition Graphs for Asynchronous Data Path Circuits
- True concurrency in models of asynchronous circuit behavior
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- Diagrammatic reasoning for delay-insensitive asynchronous circuits
- Models of asynchronous logical circuits and delays
- Designing and using a single-step functional model of an asynchronous automaton
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- Modeling and Programming Asynchronous Automata Networks: The MOCA Approach
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