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A pipelined architecture for the multidimensional DFT

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Publication:5353545
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DOI10.1109/78.942637zbMATH Open1369.65193OpenAlexW2168419221MaRDI QIDQ5353545FDOQ5353545

Earl E. jun. Swartzlander, Sungwook Yu

Publication date: 8 September 2017

Published in: IEEE Transactions on Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/78.942637





Mathematics Subject Classification ID

Numerical methods for discrete and fast Fourier transforms (65T50) Numerical algorithms for computer arithmetic, etc. (65Y04)



Cited In (3)

  • Scalable FFT processors and pipelined butterfly units
  • A Pipelined FFT Architecture for Real-Valued Signals
  • Title not available (Why is that?)





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