Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches
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Recommendations
- Secure hardware implementation of nonlinear functions in the presence of glitches
- Sequential Circuit Design for Embedded Cryptographic Applications Resilient to Adversarial Faults
- New Constructions for UC Secure Computation Using Tamper-Proof Hardware
- Design of cryptographic devices resilient to fault injection attacks using nonlinear robust codes
- Threshold Implementations Against Side-Channel Attacks and Glitches
- Composable Security in the Tamper-Proof Hardware Model Under Minimal Complexity
- Nonlinearities on cryptographic shift registers
- Theory of Cryptography
Cites work
- A Very Compact S-Box for AES
- Advanced Encryption Standard – AES
- Advances in Cryptology - CRYPTO 2003
- Block Ciphers Implementations Provably Secure Against Second Order Side Channel Analysis
- Cryptographic Hardware and Embedded Systems - CHES 2004
- DPA Leakage Models for CMOS Logic Circuits
- Fast Software Encryption
- Fast Software Encryption
- scientific article; zbMATH DE number 1979284 (Why is no real title available?)
- scientific article; zbMATH DE number 1979285 (Why is no real title available?)
- scientific article; zbMATH DE number 1759268 (Why is no real title available?)
- scientific article; zbMATH DE number 1878339 (Why is no real title available?)
- scientific article; zbMATH DE number 1418307 (Why is no real title available?)
- Selected Areas in Cryptography
- Threshold Implementations Against Side-Channel Attacks and Glitches
- Topics in Cryptology – CT-RSA 2005
- Topics in Cryptology – CT-RSA 2006
Cited in
(15)- Formal verification of masked hardware implementations in the presence of glitches
- A methodology for the characterisation of leakages in combinatorial logic
- Arithmetic Addition over Boolean Masking
- On the simplicity of converting leakages from multivariate to univariate. (Case study of a glitch-resistant masking scheme)
- Very Compact Hardware Implementations of the Blockcipher CLEFIA
- On efficient leakage-resilient pseudorandom functions with hard-to-invert leakages
- Complementing Feistel ciphers
- Higher-order glitch resistant implementation of the PRESENT S-box
- Enabling 3-share threshold implementations for all 4-bit S-boxes
- Algebraic decomposition for probing security
- Threshold Implementations Against Side-Channel Attacks and Glitches
- How fast can higher-order masking be in software?
- Secure hardware implementation of nonlinear functions in the presence of glitches
- Side-channel resistant crypto for less than 2,300 GE
- Threshold implementations of small S-boxes
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