Getting more phase margin and performance out of PID controllers
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PID controller design is investigated for first-order plus lag processes. Gain and phase margins are found for controllers that optimize standard performance indices (ISE, IAE, IATE) as the ratio of dead time to time constant of the process is varied. Examples examine (by simulation) applications to processes with models that are not considered in the body of the paper.
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Cited in
(11)- Optimal gain and phase margin tuning for PID controllers.
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