The length of a single fault detection test for constant-nonpreserving element insertions
DOI10.1007/S10598-021-09510-5zbMATH Open1460.94094OpenAlexW3127903713MaRDI QIDQ830998FDOQ830998
Authors: N. E. Aleksandrova, Dmitry S. Romanov
Publication date: 10 May 2021
Published in: Computational Mathematics and Modeling (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10598-021-09510-5
Recommendations
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Switching theory, applications of Boolean algebras to circuits and networks (94C11) Fault detection; testing in circuits and networks (94C12)
Cites Work
- Reliability and diagnostics of circuits
- Title not available (Why is that?)
- Complexity of Boolean functions in the class of polarized polynomial forms
- Circuits admitting single-fault tests of length 1 under constant faults at outputs of elements
- Title not available (Why is that?)
- SINGLE FAULT DETECTION TESTS FOR LOGIC NETWORKS OF AND, NOT GATES
- Title not available (Why is that?)
- Title not available (Why is that?)
- Synthesis of easily testable logic networks under arbitrary stuck-at faults at inputs and outputs of gates
- Complete fault detection tests of length 2 for logic networks under stuck-at faults of gates
- A method of synthesis of irredundant circuits admitting single fault detection tests of constant length
- Title not available (Why is that?)
- Dual-Mode Logic for Function-Independent Fault Testing
- A Note on Easily Testable Realizations for Logic Functions
- On Minimally Testable Logic Networks
- Short Complete Fault Detection Tests for Logic Networks with Fan-In Two
- Identity checking tests for circuits of functional elements in fan-in 2 bases
- Lower estimate of the length of the complete test in the basis \(\{x|y \}\)
Cited In (5)
- Title not available (Why is that?)
- Single fault detection tests for generalized iterative switching circuits
- Lower bound of the length of a single fault diagnostic test with respect to insertions of a mod-2 adder
- The length of single fault detection tests with respect to substitution of gates with inverters
- The length of single-fault detection tests with respect to substitution of inverters for combinational elements in some bases
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