MediaBench
From MaRDI portal
Software:20945
swMATH8949MaRDI QIDQ20945FDOQ20945
Author name not available (Why is that?)
Cited In (16)
- Memory design and exploration for low power, embedded systems
- Title not available (Why is that?)
- The need for fast communication in hardware-based speculative chip multiprocessors
- Reconfigurable coprocessor for multimedia application domain
- A framework for memory contention analysis in multi-core platforms
- Improving adaptability and per-core performance of many-core processors through reconfiguration
- A profile-based tool for finding pipeline parallelism in sequential programs
- The QC-2 parallel queue processor architecture
- Quantitative characterization of event streams in analysis of hard real-time applications
- Automatic application-specific instruction-set extensions under microarchitectural constraints
- Dynamic tag reduction for low-power caches in embedded systems with virtual memory
- Converging to periodic schedules for cyclic scheduling problems with resources and deadlines
- Scalability and parallel execution of warp processing: Dynamic hardware/software partitioning
- The ArchC architecture description language and tools
- Modulo path history for the reduction of pipeline overheads in path-based neural branch predictors
- Title not available (Why is that?)
This page was built for software: MediaBench
